Switch Mode Power Supply 100W - 16 at 7A

Generally, Schottky diodes are traditional devices use in passive rectification in order to have low conduction loss in secondary side for switching power supplies. The proliferations of synchronous rectification (SR) idea - which is mostly use in buck-derive topologies - have reached the domain of flyback application in recent years. The use of low-voltage-low-Rdson mosfet has become so attractive to replace the Schottky rectifiers in high current applications because it offers several system advantages such as dramatic decrease in conduction loss and better thermal management of the whole system by reducing the cost investment in heat sink and PCB space.



A number of techniques in the implementation of SR in flyback converters are continuously growing from a simple self-driven (secondary winding voltage detection) to a more complex solution using “current transformer sensing” or combinations of both to improve the existing technology. The idea has become quite complicated though and additional discrete devices have made the cost and part counts issue even worse. Moreover, the issue of reverse current conduction (-due to the delay in sensing the sharp drop of secondary current during turn-off phase of the SR) still lingers on in different input line/ output load conditions. The use of a simple fast-rate-direct-sensing of voltage drop across the mosfet (Vsd) using integrated solution has pave the way for a much simpler and effective means of controlling the SR mosfets as well as alleviating the reverse current and multiple-pulse gate turn-ON issues.

The board is a universal-input flyback converter with single DC output capable of delivering continuous 100W (@ +16V x 6.25A) during active rectification mode. This board is primarily designed to study synchronous rectification using IR1166 in low-side configuration to take advantage of simpler derivation of Vcc supply from converter’s output. It is equipped with necessary jumpers to ease exploring the conduction behavior of synchronous rectifiers SRs in quasi-resonant mode, so discussion would be confined to variable frequency switching in Critical Conduction Mode.

It features the fast Vsd sensing of the IR1166 Smart Rectifier Control IC with gate output drive capability of 1.5Apk. It drives 2 pcs. of SRs in parallel (100V N-ch mosfet IRF7853 in SO-8 package with very low Rdson in its class : 18 mΩ max). This had greatly simplified the overall mechanical design for not having those bulky and heavy heat sinks normally seen in high current flyback design using passive rectification.

CIRCUIT DESCRIPTION

The PCB design is basically optimized as a test platform to evaluate of active rectification using Smart synchronous rectification and as well as basic features of flyback converter operating in quasi-resonant mode.

This board has 2-pin connector ( CON1 ) for AC input and a time-lag type 3.5A fuse for input current overload protection. Minimum input filtering is provided (Cp1-Xcap) before AC input voltage (90-264VAC) is routed to a 6Amp-bridge rectifier (DB1).

Primary side controller (U2) basically drives the primary Mosfet Q1 to operate in Critical-Conduction mode to eliminate turn-ON switching loss thru ZVS (zero voltage switching only occurs when NVsec > Vdcin ) or thru LVS ( low-voltage switching when nVsec< Vdcin) to reduce capacitive losses of Q1 especially at high line condition. The switching frequency Fsw at full load varies from ~38 to ~76kHz typically from low to high input condition and falls back to minimum value (fixed ~ 6 -10kHz) to reduce input power during light load condition.

Auxiliary winding is loosely monitored by demagnetization pin4 of U2 through Dp3, Rp5 and Rp11 network that sets the OVP limit with Rp6 and Rp11 sets the over power limit of the converter.

Resonant capacitor Cp7 is added to augment the overall parasitic winding capacitance and the primary mosfet Q1’s Coss to achieve ZVS and LVS at low and high input line condition respectively.

Optocoupler U3 provides isolated output voltage feedback to the primary side. The output voltage level across load connector CON2 (+16Vo) is monitored and regulated by the V/I Secondary error amplifier U4 (AQ105 or AS4305) that also manages the output current limiting function by monitoring the voltage across the RS25-26 current sense resistors.

The power stage of the secondary is using 2-SO8 low IRF7853 synch-fets (SR) in parallel to implement the low-side synchronous rectification. In this configuration, it is simpler to derive the Vcc supply for the U1 (IR1166 SO8-IC) controller directly from the DC output Vout. Jumper J5 is used to isolate U1’s Vcc from Vout so that user may easily evaluate IC’s power consumption especially during standby load condition. In the absence of a sensitive low current probe, the quiescent current Icc through Dp4 can be calculated from the differential voltage across the Rs17. The decoupling capacitor Cs17 and Cs18 provides additional filtering which is necessary to clean high frequency noise especially when U1 is driving several mosfets (SR1 // SR2) with high Qg parameters normally associated with high currentlow voltage mosfets.

The Vd and Vs sense pins monitor the voltage (Vsd) across the sync rect mosfets and proper attention was taken during PCB routing to ensure the integrity of differential voltage Vsd. This is done by directly taking the signal Vd from the drain pins of SR1//SR2 using a dedicated trace.

Probe points as well as redundant test hook points are provided to facilitate easy probing of essential test waveforms.